Latest Trends in Hardware Security and Privacy
| Authors |
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| Publication date | 2020 |
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| Book title | 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems |
| Book subtitle | ESA-ESRIN, Italy (on-line virtual event), October 19-21, 2020 |
| ISBN |
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| ISBN (electronic) |
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| Series | DFT |
| Event | 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020 |
| Pages (from-to) | 173-176 |
| Number of pages | 4 |
| Publisher | Piscataway, NJ: IEEE |
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| Abstract |
In the last two decades we have witnessed a massive development of technologies (both hardware and software) which have enabled the creation of billions of connected devices. These devices are nowadays used in a very wide range of applications, and they all contain different types of valuable assets, which have been the target of an increasing number of cyber attacks. Both scientific and industrial communities have focused their attention to implement new design processes to reduce the risk of cybersecurity breaches. This paper includes two different contributions in the field of hardware security and privacy. |
| Document type | Conference contribution |
| Language | English |
| Published at | https://doi.org/10.1109/DFT50435.2020.9250816 |
| Other links | https://www.scopus.com/pages/publications/85097653612 |
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