Circuits resilient to short-circuit errors
| Authors |
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|---|---|
| Publication date | 2022 |
| Host editors |
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| Book title | STOC '22 |
| Book subtitle | Proceedings of the 54th Annual ACM SIGACT Symposium on Theory of Computing : June 20-24, 2022, Rome, Italy |
| ISBN (electronic) |
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| Event | 54th Annual ACM SIGACT Symposium on Theory of Computing, STOC 2022 |
| Pages (from-to) | 582-594 |
| Number of pages | 13 |
| Publisher | New York: Association for Computing Machinery |
| Organisations |
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| Abstract |
Given a Boolean circuit C, we wish to convert it to a circuit C′ that computes the same function as C even if some of its gates suffer from adversarial short circuit errors, i.e., their output is replaced by the value of one of their inputs. Can we design such a resilient circuit C′ whose size is roughly comparable to that of C? Prior work gave a positive answer for the special case where C is a formula. We study the general case and show that any Boolean circuit C of size s can be converted to a new circuit C′ of quasi-polynomial size sO(logs) that computes the same function as C even if a 1/51 fraction of the gates on any root-to-leaf path in C′ are short circuited. Moreover, if the original circuit C is a formula, the resilient circuit C′ is of near-linear size s1+є. The construction of our resilient circuits utilizes the connection between circuits and DAG-like communication protocols, originally introduced in the context of proof complexity. |
| Document type | Conference contribution |
| Language | English |
| Published at | https://doi.org/10.1145/3519935.3520007 |
| Other links | https://www.scopus.com/pages/publications/85132689174 |
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