Work In Progress: Design-Space Exploration of Multi-core Processors for Safety-Critical Real-Time Systems

Open Access
Authors
Publication date 2017
Book title 2017 IEEE Real-Time Systems Symposium
Book subtitle proceedings : 5-8 December 2017, Paris, France
ISBN
  • 9781538614167
ISBN (electronic)
  • 9781538614150
  • 9781538614143
Event 2017 IEEE Real-Time Systems Symposium
Pages (from-to) 360-362
Number of pages 3
Publisher Los Alamitos, CA: IEEE Computer Society
Organisations
  • Faculty of Science (FNWI) - Informatics Institute (IVI)
Abstract
In this paper we outline Design Space Exploration methodology aimed at homogeneous multi-core architectures, where the safety-criticality is the crux of a system design. Multi-core architectures provide better computational abilities, but at the same time complicate the computation of timing bounds. Determining suitable architectures that achieve timing requirements is an important aspect for a system designer. The proposed work conceptualizes ways to automate and explore different design facets of a multi-core processor. The intention is to ensure that the particular application meets its deadlines, while optimizing other objectives such as minimizing hardware costs, energy consumption and floor area. The automated exploration builds upon Mulitcore Response Time Analysis for timing verification and multicube for heuristic search methods. The aim is to generate an architecture design in the end that can be used directly to build a custom application specific processor.
Document type Conference contribution
Language English
Published at https://doi.org/10.1109/RTSS.2017.00040
Downloads
DSEformulticore (Accepted author manuscript)
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